FPGA Design for Power Electronics

ABSTRACT

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing. The main elements of the FPGA structure are given and the fundamental differences with the software counterpart (microcontroller and DSP) are provided. The major tools are examined (Vivado, HLS, HDL Coder) and different applications are presented. The final goals are to better understand FPGA devices and to give guidelines to choose the proper digital platform for power electronic applications.

TIMETABLE and INFO.

2nd February 2023

h. 9:30 AM - Noon, 2 PM - 4:30 PM

Final test: h. 4:45 PM - 5:15 PM

The lecture will be recorded. Those who cannot attend the course and take the test due to serious impediments can watch the recorded lecture and take the test at a later time. For further information please email prof. Ricco. You can find his email in the "Contacts" box below.

The course is part of the training provided for IBES PhD Students in the academic year 2022/2023.

The IBES PhD Students who attend the course and pass the final test:

• are eligible for max. 2 credits if they are enrolled in cycle 36 or 37;
• gain 5 attendance hours of IBES training for the Electrical Engineering curriculum if they are enrolled in cycle 38.

Check the links above for further information about the specific academic requirements for each cyle and how to comply with them.